Shashidhar R obtained his Master of Technology in VLSI Design and Embedded System from Visvesvaraya Technological University, Belagavi in the year 2014. He is currently pursuing his Ph.D. in JSS S&TU, Mysuru.  He is currently working as Assistant Professor in Department of Electronics and Communication Engineering, JSS Science & Technology University, Mysuru. Before this he also worked at Dayananda Sagar College of Engineering, Bangalore. He had organized  and attended  workshops, Faculty Development Program and  Organized  a  ISRO Sponsored National conference “Space ready Educational Institutions- A dream come true”. He is Member of IEEE.

Email Address
shashidhar.r@jssstuniv.in
Education Qualification (All qualification including diploma)

B.E., M.Tech.,(Ph.D)

Journals Published

06

Conferences Presented

08

Training Programs attended
10
Training Programs conducted and coordinated
3
Awards

1. Mentored the project titled "Wifi / Bluetooth Controlled smart Appliances with energy monitoring "and were the National Finalist and attended the Symposium 2017 held on April 7-8 2017 at IIT Bombay.
2. Gold Medalist in Master of Technology.
3. Lead a “ECTC Eagles” Cricket Team and won Dayananda Sagar Institutions Faculty Cricket Tournament in the year of 2016

Research Interests

Speech Signal Processing, Embedded System, VLSI

List of Publication

International Conferences
1. Shashidhar R, Shruthi B R, Alok N A, Nandini D B, Hariprasad S A, Shreekanth T “Real-Time Fatigue Detection Using A Low Cost Wireless EEG Device” ICEECCOT,2018 on 14th &15th December 2018
2. Santhosh kumar R, Shashidhar R, Mahalingaswamy A M, Praveen Kumar M S,  Roopa  M “Design of High Speed AES System for Efficient Data Encryption and Decryption System using FPGA” ICEECCOT,2018 on 14th &15th December 2018.
3. Swasthik B, Srihari H N, Vinay Kumar M K, Shashidhar R “Smart Assist For Alzheimer’s Patients and Elderly People” International Conference on Computing Vision and Bio Inspired Computing(ICCVBIC 2018) on 29-30 November 2018.
4. Sohan N, Ruthuja S. Urs, Sai Rishab H S,Shashidhar R” Smart Assistant Shoes for Blind” International Conference on Computing Vision and Bio Inspired Computing(ICCVBIC 2018) on 29-30 November 2018.
5. Shubhom V.T, Swathi S, Keerthan S, Abhiram G, Shashidhar R "Brapter:Compact Braille Transput Communicator" International Conference on Consumer Electronics Asia(ICCE-Asia)- 2017 on 6th and 7th Octomber 2017 at Bengalore.DOI10.1109/ICCE-ASIA.2017.8309319
6. Shreekanth T, Shashidhar R "An Application of Image Processing Technique for Compression of ECG Signals based on Region of Interest Strategy" ICCBIC 2017 on 21-22nd September 2017 at Coimature(Scopus Index, Springer - Lecture Notes in Computational Vision and Biomechanics) DOI10.1007/978-3-319-71767-8
7. Mahalingaswamy A. M, Shashidhar R, Santhoshkumar R, Roopa M "Self Dependent Tool For Quadriplegic Patient Using Home Autonation" ICSIPCA-2017 on 6th and 7th July, 2017 at JSSATE, Bengalore(Tata McGraw Hill Journal)
8. Shashidhar R, Santhoshkumar R, Mahalingaswamy A.M, Roopa M, “FPGA Implementation of Low Power Pipelined 32-bit RISC Processor Using Clock Gating”, 2016 ICECT 1st International Conference on Data Engineering and Communication Technology, pp.79 Lavasa City, Pune-India. March 10-11,2016.(Advances in Intelligent Systems and
Computing, vol 469.page no.769-777, Springer, Singapore) DOI: https://doi.org/10.1007/978-981-10-1678-3_74
Journals
1. Shreekanth T, Shashidhar R and Basavaraju N M, "Performance Evaluation of Edge detection techniques in Spatial and Frequency domain", International Journal of Multimedia and Image Processing,Volume 7,issue 1,March 2017.
2.SHREEKANTH. T and SHASHIDHAR R, (2018)" “An Application of Image Processing Technique for Compression of ECG Signals based on Region of Interest Strategy", Lecture Notes in Computational Vision and Bio Inspired Computing, Springer, Vol.28, pp.994-1005
3.Shashidhar R, Santhoshkumar R, Mahalingaswamy A.M, Roopa M,(2016) “FPGA Implementation of Low Power Pipelined 32-bit RISC Processor Using Clock Gating”, .Lecture notes on Advances in Intelligent Systems and Computing, Volume 469.page no.769-777, Springer, Singapore DOI: https://doi.org/10.1007/978-981-10-1678-3_74 Journals.
4.Shashidhar R, Mahalingaswamy A.M, Santhoshkumar R, Roopa M, “Design and Implementaion of Low Power Pipelined 32-bit High Performance RISC Core”, 2016 MAT JOURNALS Journal of Electronics and Communication Systems, PP. 1-7, volume-1, Issue-1, March 9,2016.
5. Shashidhar R, Sujay S.N, Pavan G.S. “Implementation of Bus Arbiter Using Round Robin Scheme” in IJIRSET, Volume 3, Issue 7, July 2014,
6. Shashidhar R., Rashmi K.T. “A new approach for Classifying land development in HighResolution Remote Sensing Images” in IJIRSET, Volume3, Issue 3, March 2014.

Subjects

Basic Electronics,Digital System Design, CMOS VLSI Design, Embedded System, Advanced Embedded System